John Albert asks two questions:

What would "register float" mean?
How would this work under fp:fast?

The basic guideline is that "intermediate expressions will be computed in as high as precision as is practical". For instance, suppose for a particular architecture all double-precision computations have to be emulated (i.e. a chip that intrinsically supports only single precision computations). Under the guideline, its not at all practical to emulate double or extended precision when expressions contain only single precision operands. Thus for those architectures, “register float” would map to a single precision format corresponding to the intrinsic floating-point format. Higher precision expression would have to be emulated, so “register double” and “register long double” would map to the formats of the emulated expressions.

Under fp:fast the type distinctiveness of “register float” would remain; however, the sizeof(register float) under fp:fast would be platform dependant. If the platform only supports a one precision level, then register float would map to that precision level. However, many platforms have multiple FPUs (e.g. x87 and SSE2 on Intel’s chips). Because fp:fast allows for unsafe optimizations, the compiler can legally choose to perform some FP computations on one chip at higher-precision and some on the other chip at lower-precision. Under fp:fast I think it’s reasonable to map “register float” to the least precise format used for computing single-precision operations.

Its an interesting question; thanks John